The present invention relates to a semiconductor device and a method of manufacturing it, and more particularly to a semiconductor device equipped with an alignment mark necessary to make alignment with no error in an alignment step and a method of manufacturing it.
Generally, in a process of manufacturing a semiconductor device, an alignment step must be carried out prior to photo-lithography steps. The alignment step serves to confirm and correct the arrangement of chips on a wafer and make alignment between a reticle and a chip at the step prior to light exposure, thus suppressing misalignment in superposition from occurring.
At present, as a technique of forming a wiring layer of an aluminum alloy, sputtering at a high temperature (hereinafter referred to as high temperature sputtering) is adopted. The high temperature sputtering permits a film of aluminum alloy to be stacked, and can improve coverage for a contact hole formed in an underlying interlayer insulating film and flatten the surface of the stacked aluminum alloy film. This technique is hopeful as a contact hole embedding technique.
As shown in FIG. 7, however, alignment marks 102 formed on a semiconductor device 101 in alignment have been formed as convex or concave quadrilateral each having sides of several .mu.m. For this reason, when the film of aluminum is made on the semiconductor substrate 101 by the high temperature sputtering, grains each having a large diameter of several .mu.m are formed as shown in FIG. 8. Therefore, in the subsequent alignment step, the device for alignment may erroneously recognize these grains as the alignment marks and make alignment with an error. When the error in alignment in superposition exceeds a prescribed tolerance that the resultant semiconductor device does not operate properly.
JP-6-112102 discloses alignment marks 102 permitting alignment to be made with no error even after a film is formed on the semiconductor substrate 101 by the high temperature sputtering.
In accordance with the technique disclosed in JP-6-112102, as shown in FIG. 9, an auxiliary pattern 103 covers the outer periphery of the alignment pattern 102 formed according to a prescribed size. For example, where both the alignment pattern 102 and the auxiliary pattern 103 are formed as concave patterns, the material of the film formed by the high temperature sputtering is caused to flow into the concave portion of the auxiliary pattern 103 prior to flowing into the alignment mark 102. Thus, it was possible to suppress the material from being embedded in the concave portion of the alignment mark 102, thereby permitting the contour of a main mark, i.e. alignment mark 102 to be clearly recognized after the high temperature sputtering.
This prior art, however, is silent on misalignment in superposition due to the shape of grains when aluminum and its alloy are formed by the high temperature sputtering. This prior art also leads to erroneous recognition of the alignment mark 102.